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2.4GHz to 2.5GHz 802.11g/b
RF Transceivers with Integrated PA
AC ELECTRICAL CHARACTERISTICS—Timing (continued)
(MAX2831 EV kit: V CC_ = 2.8V, V CCPA = V CCTXPA = 3.3V, T A =+25°C, f LO = 2.437GHz, f REF = 40MHz, SHDN = CS = high, SCLK =
DIN = low, PLL loop bandwidth = 150kHz, and T A = +25°C, unless otherwise noted.) (Note 1)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
3-WIRE SERIAL-INTERFACE TIMING (See Figure 2)
SCLK Rising Edge to CS Falling
Edge Wait Time, t CSO
Falling Edge of CS to Rising
Edge of First SCLK Time, t CSS
DIN to SCLK Setup Time, t DS
DIN to SCLK Hold Time, t DH
SCLK Pulse-Width High, t CH
SCLK Pulse-Width Low, t CL
Last Rising Edge of SCLK to
Rising Edge of CS or Clock to
Load Enable Setup Time, t CSH
CS High Pulse Width, t CSW
Time Between the Rising Edge of
CS and the Next Rising Edge of
SCLK, t CS1
Clock Frequency, f CLK
Rise Time, t R
Fall Time, t F
6
6
6
6
6
6
6
20
6
20
2
2
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
ns
ns
Note 1: Min and max limits are guaranteed by test at T A = +25°C and +85°C and guaranteed by design and characterization at
T A = -40°C. The power-on register settings are not production tested. Recommended register setting must be loaded after
V CC is supplied.
Note 2: Guaranteed by design and characterization.
Note 3: The nominal part-to-part variation of the RF gain step is ±1dB.
Note 4: Two tones at +25MHz and +48MHz offset with -35dBm/tone. Measure IM3 at 2MHz.
Note 5: Tx I/Q inputs = 100mV RMS .
10
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